Defect repair circuit and defect repair method

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United States of America Patent

PATENT NO 11798649
SERIAL NO

17467529

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Abstract

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Disclosed are a defect repair circuit and a defect repair method. The defect repair circuit includes: a test module, configured to perform defect test on a memory cell array in a test module to determine a defective memory cell, and output test address information and defect flag signal corresponding to the memory cell; a defect information storage module, connected with the test module, configured to store defect address information responsive to the defect flag signal, the defect address information being the test address information of the defective memory cell, and further configured to output first address information responsive to an externally input repair selection signal, the first address information being one of multiple pieces of defect address information; and a repair module, connected with the defect information storage module and configured to repair a corresponding defective memory cell according to the received first address information.

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Patent Owner(s)

  • CHANGXIN MEMORY TECHNOLOGIES, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Zhang, Liang Shanghai, CN 626 3127

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