PLL/FLL circuit with gain control

United States of America Patent

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Feb 8, 2011
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Feb 3, 2011
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Aug 3, 2009
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Aug 3, 2009

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to an optimum value, and configures a desired loop bandwidth.

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PANASONIC CORPORATION

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H03L:AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR S....

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Inventor Name	Address	# of filed Patents	Total Citations
Miyanaga, Kenji	Osaka, JP	44	404

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PLL/FLL circuit with gain control

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United States of America Patent

12534663

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PATENT NO	7884676
APP PUB NO	20110025424A1
SERIAL NO	12534663
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
February 08, 2011	US,7884676,B1 US7884676B1	GRANTED PATENT AS FIRST PUBLICATION
February 03, 2011	US,20110025424,A1 US20110025424A1	FIRST PUBLISHED PATENT APPLICATION

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