Semiconductor device having a floating node that can maintain a predetermined potential for long time, a semiconductor memory device having high data maintenance performance, and a method of manufacturing thereof
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United States of America Patent
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Apr 13, 1999
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N/A
app pub date -
Oct 16, 1996
filing date -
Sep 1, 1994
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Abstract
In a dynamic random access memory device including an SOI substrate and a field shield isolation region, a p type impurity region is formed between an n type source/drain region of a transistor coupled to a storage node in a dynamic memory cell and an n type impurity region below a field shield electrode A reverse bias voltage is supplied respectively between the p and n type impurity regions, and between the n type source/drain region of the transistor and the p type body region. As a result, leakage current from the n type source/drain region to the p type body region is compensated for by the leakage current from the n type impurity region to the p type impurity region
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