Semiconductor package and fabrication method thereof
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United States of America Patent
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Apr 3, 2007
Grant Date -
Jun 8, 2006
app pub date -
Jan 24, 2005
filing date -
Dec 2, 2004
priority date (Note) -
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Abstract
A semiconductor package and a fabrication method thereof are proposed. A lead frame is provided between a chip and a substrate in a window ball grid array semiconductor package, wherein an active surface of the chip is electrically connected to the lead frame via bonding wires formed in an opening of the substrate and is electrically connected to the substrate via the lead frame. The provision of lead frame can improve the heat dissipating efficiency and electrical performances. The bonding wires located in the opening of the substrate eliminate the prior-art drawback of requiring different molds in response to different opening structures of a substrate.
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