Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization

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United States of America Patent

PATENT NO 7367026
APP PUB NO 20050283775A1
SERIAL NO

10919115

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Abstract

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A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains multiple non-stride-one memory accesses that operate over a contiguous stream of memory is disclosed. A preferred embodiment identifies groups of isomorphic statements within a loop body where the isomorphic statements operate over a contiguous stream of memory over the iteration of the loop. Those identified statements are then converted into virtual-length vector operations. Next, the hardware's available vector length is used to determine a number of virtual-length vectors to aggregate into a single vector operation for each iteration of the loop. Finally, the aggregated, vectorized loop code is converted into SIMD operations.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Eichenberger, Alexandre E Chappaqua, NY 83 2345
Wang, Kai-Ting Amy North York, CA 39 540
Wu, Peng Mt. Kisco, NY 292 2532

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