Enhanced reliability semiconductor package
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United States of America Patent
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May 18, 2010
Issued Date -
N/A
app pub date -
Jan 10, 2005
filing date -
Jan 10, 2005
priority date (Note) -
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Abstract
A method of packaging a semiconductor component with a printed wiring board is disclosed. The method includes determining a first distance, applying a thin film onto a surface of the semiconductor component such that the thin film is spaced apart from a support of the semiconductor, applying a solder pad onto the printed wiring board, placing the semiconductor component with the thin film onto the printed wiring board, and positioning the thin film adjacent the solder pad.
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