Viterbi decoder
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United States of America Patent
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Nov 13, 2001
Grant Date -
N/A
app pub date -
Aug 6, 1998
filing date -
Aug 7, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An apparatus for providing and storing a state metric which is used for an add-compare-select (ACS) operation in a Viterbi decoder using a number of ACS units in order to enhance decoding speed. A state metric memory in Viterbi decoder uses a two-port memory, in which a memory bank for reading and writing a state metric of a first half among the N state metrics generated in a ACS unit and two memory banks for alternately reading and writing the state metric of the second half whenever a codeword is input, are incorporated into a single memory. As a result, the storage capacity for storing the state metrics can be greatly reduced as compared to a conventional apparatus.
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