Method and system to lower the minimum operating voltage of register files

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United States of America Patent

PATENT NO 8320203
APP PUB NO 20110235445A1
SERIAL NO

12748208

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Abstract

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A method and system to lower the minimum operating voltage of a register file without increasing the area of each bit cell of the register file. In one embodiment of the invention, the register file is coupled to logic that reduces the contention between the NMOS devices and the PMOS devices in each bit cell of the register file during write and/or read operations of the register file. By doing so, the register file is able to operate at a lower minimum operating voltage.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hwang, Seung H Portland, US 1 2
Wijeratne, Sapumal B Portland, US 3 20

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