Semiconductor package
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United States of America Patent
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Aug 30, 2022
Grant Date -
N/A
app pub date -
Mar 18, 2021
filing date -
Jul 30, 2020
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A semiconductor package includes a bottom package and an upper redistribution layer disposed on the bottom package. The bottom package includes a substrate and a semiconductor chip disposed on the substrate. A conductive pillar extends upwardly from the substrate and is spaced apart from the semiconductor chip. A mold layer is disposed on the substrate and encloses the semiconductor chip and lateral side surfaces of the conductive pillar. The conductive pillar includes a connection pillar configured to electrically connect the substrate to the upper redistribution layer and an alignment pillar that is spaced apart from the connection pillar. The upper redistribution layer includes a redistribution metal pattern configured to be electrically connected to the connection pillar. A first insulating layer is in direct contact with a top surface of the redistribution metal pattern. A top surface of the alignment pillar is in direct contact with the first insulating layer.
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