Memory structure and fabrication method thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11943918
APP PUB NO 20230255024A1
SERIAL NO

18135552

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A memory structure is provided in the present disclosure. The memory structure includes a substrate, a plurality of discrete memory gate structures on the substrate where each of the plurality of memory gate structures includes a floating gate layer and a control gate layer on the floating gate layer, an isolation layer formed between adjacent memory gate structures where a top surface of the isolation layer is lower than a top surface of the control gate layer and higher than a bottom surface of the control gate layer, an opening is formed on an exposed sidewall of the control gate layer, and a bottom of the opening is lower than or coplanar with the top surface of the isolation layer, and a metal silicide layer on an exposed surface of the control gate layer and the top surface of the isolation layer.

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Patent Owner(s)

  • SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION; SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Han, Liang Shanghai, CN 120 1564
Wang, Hai Ying Shanghai, CN 4 3

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