Field effect transistor with buried gate pattern
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United States of America Patent
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Apr 22, 2008
Grant Date -
Jun 22, 2006
app pub date -
Sep 30, 2005
filing date -
Dec 21, 2004
priority date (Note) -
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Abstract
A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.
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