Propagation test strobe circuitry with boundary scan circuitry
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 2, 2010
Grant Date -
May 7, 2009
app pub date -
Jan 9, 2009
filing date -
Jun 10, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry, including gating producing a Capture Test Strobe (CTS) signal, and the boundary scan cells are required to implement the additional instructions. The instructions are extensions of the conventional JTAG operating structure.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully