SOI MOS field effect transistor and manufacturing method therefor
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United States of America Patent
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Mar 11, 2003
Grant Date -
N/A
app pub date -
Jan 14, 2002
filing date -
Sep 28, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A device isolation region made up of a silicon oxide film, which is perfectly isolated up to the direction of the thickness of an SOI silicon layer, and an activation region of the SOI silicon layer, whose only ends are locally thinned, are formed on an SOI substrate. A source diffusion layer and a drain diffusion layer of a MOS field effect transistor in the activation region are provided so that according to the silicidization of the SOI silicon layer subsequent to the formation of a high melting-point metal, a Schottky junction is formed only at each end of the activation region and a PN junction is formed at a portion other than each end thereof.
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