DC offset cancel circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6968172
APP PUB NO 20030148749A1
SERIAL NO

10349106

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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This invention is applied to dual mode provided receiver capable of coinciding with both TDMA system and the non-TDMA system so as to provide a DC offset cancel circuit preferable for each communication method having a compact structure. In case where a predetermined time slot is allocated as an offset quantity detection time in the TDMA system, a first feedback loop is activated and corresponding to detection signals corresponding to differential output signals OUT, XOUT by a comparator 2, a detection result is updated in the holding section 3 according to a strobe signal STB and held therein. Output signals from the holding section 3 are fed back to an amplifier 1 through a selection section 5 and a DC offset is cancelled out. In case where the offset quantity is detected successively, a second feedback loop is activated and then, detection signals from the comparator 2 are identified by a filter section 4, and fed back to the amplifier 1 through the selection portion 5, so that the DC offset is cancelled out.

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Patent Owner(s)

  • MONTEREY RESEARCH, LLC

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Saito, Shinji Kasugai, JP 327 5335

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