5 volt driver in a 3 volt CMOS process
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United States of America Patent
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Nov 4, 1997
Grant Date -
N/A
app pub date -
Dec 22, 1995
filing date -
Dec 22, 1995
priority date (Note) -
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Abstract
A CMOS voltage level shifter that is comprised of a pull-up device coupled between a first voltage supply and an node to pull up that node to the voltage of the first voltage supply. The pull-up device is responsive to a first voltage signal. A pull-down device is also included that is coupled between the node and a reference voltage supply to pull down that node to a voltage of the reference voltage. The pull-down device is responsive to second and third voltage signals. A feedback circuit is included that provides the second voltage signal to the pull-down device. A level shifted output voltage signal is provided at the node.
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