Delay locked loop device and method for operating the same

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United States of America Patent

PATENT NO 11742862
APP PUB NO 20230068525A1
SERIAL NO

17445949

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Abstract

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A method includes following operations: a delay line delaying a first clock signal by a delay time to generate an output signal; a controller delaying the output signal by a first time interval to generate a first signal; the controller delaying the first clock signal by a second time interval shorter than the first time interval to generate a second clock signal; and the controller controlling the delay line according to the first signal and the second clock signal to adjust the delay time. A delay locked loop device is also disclosed herein.

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Patent Owner(s)

  • NANYA TECHNOLOGY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yang, Wu-Der Taoyuan City, TW 90 143

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