Data communication system and bit-timing circuit

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United States of America Patent

PATENT NO 4189622
SERIAL NO

05847529

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A digital timing system and method is disclosed for improving the bit-error-rate performance of digital communications systems, such as satellite communications links which experience deep fades caused by ionospheric scintillation with resultant loss of synchronization for multibit time durations. The present invention prevents timing loss and bit-shift under such ionospheric conditions, and is also applicable to land lines, computer communications links and any other communication channels vulnerable to timing loss and resultant data bit-shift caused by noise, extraneous transitions or transmission line anamolies. A novel bit-timing circuit is described which analyzes incoming phase-shifted digital data transitions to select a 'best-fit' clock from a plurality of discrete clocks of like frequency but displaced in phase for clocking the data. The discrete clocks are derived directly from a highly stable crystal oscillator source. Incoming data transitions are converted to pulses multiplexed in time to divide the data bit periods into a plurality of incremental time intervals, each time interval being associated with a data accumulator and one of said discrete clocks for counting data transitions over a predetermined number of bits. The contents of the accumulators are monitored to determine whether the data therein is valid or invalid, with a preponderance of data in any one accumulator being indicative of valid data. Valid data is clocked out by the 'best-fit' clock while an invalid data indication inhibits the shifting of clock phase until valid data is again received.

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Patent Owner(s)

  • E-SYSTEMS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Foshee, James J Dayton, OH 1 22

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