Method and system for use of a field programmable function within a standard cell chip for repair of logic circuits
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United States of America Patent
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Apr 8, 2003
Grant Date -
N/A
app pub date -
Dec 10, 2001
filing date -
Dec 10, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An application specific integrated circuit (ASIC) is disclosed. The ASIC comprises a standard cell. The standard cell includes a plurality of logic functions. The ASIC further includes a field programmable (FP) logic function for coupling the plurality of logic functions together via a plurality of input and output stages. The FP logic function can be programmed for field repair of at least one of the plurality of the logic functions. A method and system in accordance with the present invention utilizes a distributed field programmable logic block in conjunction with standard cells to provide for field repair and improved redundancy. To describe the features of the present invention in more detail, refer now to the following description in conjunction with the accompanying drawings.
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