Mixed mode power regulator circuitry for memory elements
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United States of America Patent
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Jan 11, 2011
Grant Date -
N/A
app pub date -
Jul 2, 2007
filing date -
Jul 2, 2007
priority date (Note) -
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Abstract
Power regulator circuitry is provided for powering loads such as programmable memory element arrays on integrated circuits. The power regulator circuitry may have control circuitry that generates a first digital control signal to turn on and off a regulated power supply circuit and a second digital control signal to turn on and off a switch-based power supply circuit. The outputs of the regulated power supply circuit and switch-based power supply circuit may be connected to an output terminal for the power regulator circuitry. The first and second digital control signals may be used to ensure that the regulated power supply circuit is turned on before the switch-based power supply circuit is turned off. The switch-based power supply circuitry may contain serially connected transistors. The transistors may be turned off in an order that prevents latchup.
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