Semiconductor device having enhanced gate capacitance by using both high and low dielectric materials
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United States of America Patent
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Aug 8, 2000
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N/A
app pub date -
Jul 16, 1998
filing date -
Mar 31, 1998
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Abstract
A method for fabricating a MOSFET device is provided. The method includes a step of forming a gate oxide including first and second gate oxide materials. The first gate oxide material has a higher dielectric constant than the second gate oxide material. The first gate oxide material is formed to be over source/drain extension regions of the device; and the second gate oxide material is formed over a channel region of the device. The first gate oxide material has a low dielectric constant and provides for mitigating gate fringing field effects. The second gate oxide material has a high dielectric constant and provides for forming a thick gate oxide over a channel region of the device. Controlled uniform growth of the second gate oxide material is facilitated because of the thickness thereof.
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