Metal interconnect structure and method for fabricating the same

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United States of America

PATENT NO 10978339
APP PUB NO 20190355618A1
SERIAL NO

16011615

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Abstract

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A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co—Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.

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Patent Owner(s)

Patent OwnerAddress
UNITED MICROELECTRONICS CORPNO 3 LI-HSIN RD II SCIENCE-BASED INDUSTRIAL PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Da-Jun Kaohsiung, TW 50 19
Tsai, Bin-Siang Changhua County, TW 84 58

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