Residue checking apparatus for detecting errors in add, subtract, multiply, divide and square root operations
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United States of America Patent
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May 15, 1990
Grant Date -
N/A
app pub date -
Nov 23, 1988
filing date -
Nov 23, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention concerns a residue checking apparatus which uses common circuitry to conduct residue checking of the outcome of an arithmetic operation which may be an add, a subtract, a multiply, a divide, or a square root operation.
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