Method for using layout regions to predict single-event effects
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United States of America Patent
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Jun 26, 2007
Grant Date -
Feb 8, 2007
app pub date -
Aug 8, 2005
filing date -
Jul 8, 2005
priority date (Note) -
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Abstract
A method for modeling a circuit layout to determine behavior responsive to a radiation event is set forth. The method includes identifying a first portion of the circuit layout that includes at least one body region of a MOS transistor in the circuit layout, the at least one region having a width substantially equal to that of the MOS transistor. A first model corresponding to the first portion of the circuit layout is selected. A second portion of the circuit layout that includes at least a first region within a drain of the MOS transistor in the circuit layout is identified and an appropriate second model corresponding to the second portion of the circuit layout is selected, wherein the at least one second model includes at least one parasitic bipolar transistor.
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