Programmable packet parsing processor

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7586851
APP PUB NO 20050238010A1
SERIAL NO

10832796

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The present invention provides a packet processing device and method. A parsing processor provides instruction-driven content inspection of network packets at 10-Gbps and above with a parsing engine that executes parsing instructions. A flow state unit maintains statefulness of packet flows to allow content inspection across several related network packets. A state-graph unit traces state-graph nodes to keyword indications and/or parsing instructions. The parsing instructions can be derived from a high-level application to emulate user-friendly parsing logic. The parsing processor sends parsed packets to a network processor unit for further processing.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • CISCO TECHNOLOGY, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bagepalli, Nagaraj A San Jose , US 30 2866
Jain, Sanjay Santa Clara , US 114 1574
Liu, Jackie Sunnyvale , US 11 216
Ng, Daniel Yu-Kwong San Jose , US 4 135
Panigrahy, Rina Sunnyvale , US 44 1649
Patra, Abhijit San Jose , US 67 5565

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation