Memory access commands with near-memory address generation

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11216373
APP PUB NO 20210374055A1
SERIAL NO

16887713

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Abstract

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A memory controller may be configured with command logic that is capable of sending a memory access command having incomplete address information via a command/address bus that connects the memory controller to memory modules. The memory controller may send the memory access command via the bus for accessing data stored at memory locations of the memory modules. The memory locations may correspond to different near-memory generated reflecting that the data is not address aligned across the memory modules. Nonetheless, because of the near-memory address generation, the memory controller can send the memory access command having incomplete address information for accessing the data stored at the different addresses, as opposed to having to send multiple memory access commands specifying complete address information on the bus for accessing the data at the different addresses, thereby conserving usage of the available bus bandwidth, reducing power consumption, and increasing compute throughput.

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Patent Owner(s)

  • ADVANCED MICRO DEVICES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aga, Shaizeen Santa Clara, US 38 20
Alsop, Johnathan Bellevue, US 20 4
Jayasena, Nuwan Santa Clara, US 92 449

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