Method and structure for fabricating dark-periphery mask for the manufacture of semiconductor wafers
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United States of America Patent
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May 10, 2011
Grant Date -
Dec 31, 2009
app pub date -
Jun 27, 2008
filing date -
Jun 27, 2008
priority date (Note) -
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Abstract
A method for manufacturing an integrated circuit devices. The method includes providing a substrate, which includes an opaque film overlying the substrate, an overlying negative photoresist layer, a stop layer overlying the negative photoresist layer, and a positive photoresist layer overlying the stop layer. The method includes patterning the positive resist layer to form one or more window openings in the positive photoresist layer. The method also includes removing the exposed stop layer within the one or more window openings to expose a portion of the negative photoresist layer and patterning the exposed portion of the negative photoresist layer. The method includes developing the exposed portion of the negative photoresist layer and removing exposed portions of the opaque layer to expose an underlying portion of the substrate. The method further includes removing any remaining portions of the negative photoresist layer, stop layer, and positive photoresist layer to provide a patterned mask. The patterned mask is used for a manufacture of integrated circuits.
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