Automatic probe card planarization system

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United States of America Patent

PATENT NO 5861759
SERIAL NO

08791767

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention provides an automatic probe card planarization system and method to planarize a first plane defined by a plurality of contact points of a probe card relative to a second plane defined by a top surface of a wafer supported on a prober, with the probe card intermediate the wafer and a tester with the probe card interfacing eclectically with the tester to test the performance of the wafer. The planarization is performed by interfacing the probe card to the wafer by individually interfacing three points fixed points on the tester with three points on the prober. On of the points on the prober being fixed, while the other two are height variable as a result of calculations by a processor. Additionally, a camera is used to measure the height of at least three selected contact points on the probe card relative to the plane of wafer, from which the position of the first plane relative to said second plane is calculated. With that information and the geometry of the prober and tester, the height variations necessary for the two height variable points on the prober are calculated and the height adjustments made to planarize the first plane relative to the second plane. Alternatively, the height adjustments can be included in the tester, or one in each of the tester and the prober.

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Patent Owner(s)

  • TOKYO ELECTRON LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bialobrodski, Marian R Danville, CA 1 41
Lupan, Marius R Danville, CA 1 41

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