Efficient I-cache structure to support instructions crossing line boundaries

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United States of America Patent

PATENT NO 6480938
APP PUB NO 20020116567A1
SERIAL NO

09738690

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Abstract

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A cache structure, organized in terms of cache lines, for use with variable length bundles of instructions (syllables), comprising: a first cache bank that is organized in columns and rows; a second cache bank that is organized in columns and rows; logic for defining said cache line into a sequence of equal sized segments, and mapping alternate segments in said sequence of segments to the columns in said cache banks such that said first bank holds even segments and said second bank holds odd segments; logic for storing bundles across at most a first column in said first cache bank and a sequentially adjacent column in said second cache bank; and logic for accessing bundles stored in the first and second cache banks.

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Patent Owner(s)

  • HEWLETT-PACKARD COMPANY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Vondran, Jr Gary L Winchester, MA 18 367

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