Data processor executing memory indirect addressing and register indirect addressing
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United States of America Patent
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Aug 24, 1993
Grant Date -
N/A
app pub date -
May 4, 1990
filing date -
Mar 24, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A data processor which comprises a pipeline processing mechanism for executing memory indirect addressing and register indirect addressing in an address calculation stage, checks whether or not an instruction writes an operand to a memory or register, makes each stage of the pipeline mechanism hold reservation information thereof in sequence, thereby reduces the frequency of stops of pipeline processing caused by processing of operand address calculation of the following instruction attending on a writing of the operand of the preceding instruction to a memory or register, so that data processing can be execute at a higher efficiency.
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