Timing controller with delay time units for a semiconductor storage device
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United States of America Patent
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Aug 23, 2016
Grant Date -
Jul 30, 2015
app pub date -
Apr 7, 2015
filing date -
Nov 2, 2011
priority date (Note) -
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Abstract
A semiconductor storage device according to the present embodiment includes a plurality of memory units respectively comprising a plurality of memory cells. A data bus is shared by the memory units and transfers data from the memory units or to the memory units. A timing controller includes a delay time unit shared by the memory units sharing the data bus. The timing controller is configured to output a control signal for driving the memory units after a predetermined delay time elapses since receiving an input signal.
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