Semiconductor package and method of fabricating the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11948872
APP PUB NO 20220310496A1
SERIAL NO

17509224

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Disclosed are semiconductor packages and their fabricating methods. The semiconductor package comprises a redistribution substrate, a semiconductor chip on a top surface of the redistribution substrate, and a solder terminal on a bottom surface of the redistribution substrate. The redistribution substrate includes an under-bump pattern in contact with the solder terminal, a dielectric layer on a sidewall of the under-bump pattern, an under-bump seed pattern between the dielectric layer and the sidewall of the under-bump pattern, and a redistribution pattern on the under-bump pattern. The under-bump pattern has central and edge regions. A first top surface at the edge region of the under-bump pattern is at a level higher than that of a second top surface at the central region of the under-bump pattern. An angle between the bottom surface and the sidewall of the under-bump pattern is in a range of 110° to 140°.

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Patent Owner(s)

  • SAMSUNG ELECTRONICS CO. LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bae, Minjun Hwaseong-si, KR 11 7
Jeon, Gwangjae Hwaseong-si, KR 17 8
Kim, Jongyoun Seoul, KR 44 35
Lee, Hyeonseok Anyang-si, KR 13 6

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