High performance clock domain crossing FIFO

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United States of America Patent

PATENT NO 11249511
APP PUB NO 20190317548A1
SERIAL NO

16456694

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Abstract

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The disclosure relates to clock-crossing elements that may be used to transfer data between different clock domains. The embodiments include dual clock first-in first-out (FIFO) buffers that may employ toggle-based protocols to manage the transference of information regarding the state of the FIFO buffer. The toggle-based protocols may include a feedback-based handshake and bit-sliced toggle lines to prevent errors due to differences between the clock signals in the different clock domains.

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Patent Owner(s)

Patent OwnerAddress
ALTERA CORPORATION101 INNOVATION DRIVE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Thong, Jason Mississauga, CA 1 1

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