Post passivation interconnection schemes on top of IC chip
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United States of America Patent
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Mar 29, 2011
Grant Date -
Feb 21, 2008
app pub date -
Sep 17, 2007
filing date -
Oct 18, 2000
priority date (Note) -
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Abstract
A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric, a thick second layer of dielectric is created over the surface of the layer of passivation. Thick and wide interconnect lines are created in the thick second layer of dielectric. The first layer of dielectric may also be eliminated, creating the wide thick interconnect network on the surface of the layer of passivation that has been deposited over the surface of a substrate.
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