Complementary metal-insulator-semiconductor devices

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5585659
SERIAL NO

08320690

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method for fabricating semiconductor devices wherein polysilicon gates for complementary-type field-effect semiconductor devices are formed of polysilicon to which impurity doped simultaneously to the polysilicon deposition; the both gates having the dual N.sup.+ /P.sup.+ polysilicon gate structure, so that the both N- and P-channel transistors are formed as the surface-channel type ones; and therefore, the off-characteristic, the short channel effect, and the controllability of threshold voltage are progressed. More specifically, N- and P-channel MISFETs are provided on a common semiconductor substrate (1); N-type polysilicon (9) doped with N-type impurity is adopted as the gate electrode for the N-channel MISFET; P-type polysilicon (8) doped with P-type impurity is adopted as the gate electrode for the P-channel MISFET; and a narrow region preventing the mutual diffusion of impurities is provided between portions of respective polysilicon.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • NIPPON TELEGRAPH AND TELEPHONE CORPORATION

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Inokawa, Hiroshi Isehara, JP 9 135
Kobayashi, Toshio Atsugi, JP 259 3975
Miyake, Masayasu Ebina, JP 14 397
Morimoto, Takashi Kawasaki, JP 181 2020
Okazaki, Yukio Isehara, JP 25 236

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation