Shift register, gate driving circuit and display panel having the same, and method thereof
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United States of America Patent
Stats
-
Jul 31, 2007
Grant Date -
Apr 6, 2006
app pub date -
Oct 3, 2005
filing date -
Oct 1, 2004
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A shift register includes a plurality of stages each generating an output signal in sequence and including a buffering section, a driving section, a first charging section, and a charging control section. The buffering section receives one of a scan start signal and an output signal of a previous stage so that the driving section generates the output signal of a present stage. The first charging section includes a first terminal electrically connected to the driving section and a second terminal electrically connected to a first source voltage. The charging control section applies the output signal of a next stage to the first charging section. Therefore, a gradual failure of TFT is reduced.
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