Processing method for protection of backside of a wafer

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United States of America Patent

PATENT NO 7241693
SERIAL NO

11107885

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Abstract

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A temporal protection layer is employed to a wafer backside for use of micro-electro-mechanical systems (MEMS). The formation of the temporal protection layer prevents the wafer backside from scratch in process of transferring system for IC manufacturers. With regard to low cost and easy forming and removing, an oxide layer is used as the temporal protection layer. The throughput and yield rate of the wafer production are improved by the use of the temporal protection layer.

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Patent Owner(s)

  • MACRONIX INTERNATIONAL CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hsu, Chih-Chia Hsin-Chu, TW 11 11
Huang, Yin-Fu Hsin-Chu, TW 18 30
Lee, Cheng-Hsiung Hsin-Chu, TW 8 49
Lee, Lung-An Hsin-Chu, TW 1 0
Tseng, Kuo-Pang Hsin-Chu, TW 8 7

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