Semiconductor device adapted for power shutdown and power resumption
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United States of America Patent
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Aug 2, 2005
Grant Date -
Nov 27, 2003
app pub date -
May 20, 2003
filing date -
May 23, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor device that achieves high speed and low power consumption that can be used in a real-time system by preventing held data from disappearing at the time of power shutdown and sharply rising power while also preventing a through-current at the time of power resumption. During normal operation, the switch is on, and the clock generating circuit and the data holding circuit are operated with the first power supply voltage. When data holding is required at the time of power shutdown, the switch and the first power supply voltage supplied to the logic circuit are turned off, and the clock generating circuit and the data holding circuit are operated with the second power supply voltage.
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