Semiconductor memory device
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United States of America Patent
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May 18, 2010
Grant Date -
Nov 20, 2008
app pub date -
Dec 28, 2007
filing date -
May 17, 2007
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor memory device has a memory cell having a hierarchical bit line structure for large capacity even in a small cell size. The semiconductor memory device comprises a unit cell configured to read/write data, a cell data sensing unit configured to adjust a current amount of a main bit line depending on a sensing voltage of a sub bit line when data are sensed, and a write control unit configured to store data in the corresponding unit cell depending on a current level applied from the main bit line to the sub bit line.
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