Interface circuit including buffer circuit for high speed communication, semiconductor apparatus and system including the same

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United States of America Patent

PATENT NO 9590625
APP PUB NO 20160254814A1
SERIAL NO

14742922

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Abstract

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A buffer circuit may include an amplification unit and an active load unit. The amplification unit is electrically coupled to an output node and configured to sense and amplify first and second signals. The active load unit is configured to form a peak of a signal outputted from the output node when the signal transitions.

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Patent Owner(s)

  • SK HYNIX INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hwang, Kyu Dong Icheon-si, KR 26 52

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