Method and apparatus for processing blocks in a pipeline
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United States of America Patent
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Jul 8, 2008
Grant Date -
Oct 28, 2004
app pub date -
May 21, 2001
filing date -
May 21, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
Method in a pipeline processing stage in a processor, includes the steps of: receiving a first block from a first register and a first execution parameter associated with the first block from a second register, the execution parameter having a first value; inspecting a set of data being at least a part of the first block; and, if the set of data differs from a predetermined condition, storing a second execution parameter on a third register and a third execution parameter on the second register, where the second execution parameter has a second value and is associated with the first block and the third execution parameter has the first value and will be associated with a second block. The invention also relates to the pipeline processor, a module, an integrated circuit and a computer unit.
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