Flip-flop with scan path

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United States of America Patent

PATENT NO 5173626
SERIAL NO

07712541

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An improved flip-flop with a scan path comprises a front page circuit driven in response to a clock signal and multiplexers for receiving a data signal and a scan test signal. Each of the multiplexers comprises a single stage of FETs connected in series between a power source and a ground. This arrangement can remarkably improve an operation frequency.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kudou, Tsuneaki Yokohama, JP 10 104
Nakamura, Naoko Yokohama, JP 27 157

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