Semiconductor device and a method of manufacturing the same

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United States of America Patent

PATENT NO 7388256
SERIAL NO

11475989

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Abstract

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In a technique to improve the high-frequency power gain of an LDMOS, the distance from the surface of a passivation film covering electrode pads to the rear surface of a silicon substrate is set into 200 .mu.m or less, or a trench of 2 .mu.m or more in thickness, in which an insulating film or a conductor is embedded, is formed between a region where a p type impurity is diffused, when a p.sup.+ type source penetrating layer is formed, and the channel region of a third LDMOS, so as to extend from the front surface of a semiconductor layer toward a silicon substrate. This trench restrains the p.sup.+ type source penetrating layer from spreading to the channel region, thereby lowering the inductance or the resistance of the source and improving the high-frequency power gain.

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Patent Owner(s)

  • MURATA MANUFACTURING CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kurotani, Kingo Takasaki, JP 9 19
Nagura, Kenichi Moroyama, JP 7 54
Sakamoto, Takeshi Takasaki, JP 265 3575
Yano, Michio Maebashi, JP 2 4

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