Packaging process for side-wall plating with a conductive film

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United States of America Patent

PATENT NO 11450534
APP PUB NO 20210366729A1
SERIAL NO

17059074

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Techniques and devices are disclosed for forming wettable flanks on no-leads semiconductor packages. A lead frame assembly may include a plurality of leads, each lead including a die surface and a plating surface, and an integrated circuit die arranged on the die surface. The plating surface for each of the leads may be plated with an electrical plating. A connecting film may be applied and lead frame assembly may be singulated into individual semiconductor packages by a series of cuts through each of the plurality of leads and the electrical plating of each of the plurality of leads to a depth up to or through a portion of the connecting film to create a channel exposing lead sidewalls of each of the plurality of leads. The lead sidewalls of each of the plurality of leads may be plated with a second electrical plating and the connecting film may be removed.

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Patent Owner(s)

Patent OwnerAddress
VISHAY GENERAL SEMICONDUCTOR LLC100 MOTOR PARKWAY SUITE 135 HAUPPAUGE NY 11788

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ding, Huiying Tianjin, CN 4 2
Jin, Longnan Tianjin, CN 4 2
Karrer, Heinrich Regau, AT 5 11
Liu, Junfeng Tianjin, CN 52 576
Schmidt, Thomas Leonding, AT 305 1576

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