Semiconductor device and manufacturing method thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10134908
APP PUB NO 20170186880A1
SERIAL NO

15363386

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Abstract

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A MISFET is formed to include: a co-doped layer that is formed over a substrate and has an n-type semiconductor region and a p-type semiconductor region; and a gate electrode formed over the co-doped layer via a gate insulation film. The co-doped layer contains a larger amount of Mg, a p-type impurity, than that of Si, an n-type impurity. Accordingly, the carriers (electrons) resulting from the n-type impurities (herein, Si) in the co-doped layer are canceled by the carriers (holes) resulting from p-type impurities (herein, Mg), thereby allowing the co-doped layer to serve as the p-type semiconductor region. Mg can be inactivated by introducing hydrogen into, of the co-doped layer, a region where the n-type semiconductor region is to be formed, thereby allowing the region to serve as the n-type semiconductor region. By thus introducing hydrogen into the co-doped layer, the p-type semiconductor region and the n-type semiconductor region can be formed in the same layer.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Miyamoto, Hironobu Ibaraki, JP 115 1970
Nakayama, Tatsuo Ibaraki, JP 90 1818
Okamoto, Yasuhiro Ibaraki, JP 208 3493

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