Method and apparatus for improving bus efficiency by enabling arbitration based upon availability of completion data

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United States of America Patent

PATENT NO 5850530
SERIAL NO

08573680

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention provides a system that selectively allows an arbitration cycle to occur only when specific data is ready for transfer. That is, a flag register is provided and its output is ANDed with a bus request signal from a bus device. An arbiter will accept a bus request and initiate an arbitration cycle only when the state of a bit in the flag register indicates that actual completion data exists for the requesting device.

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First Claim

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Wen-Tzer Thomas Austin, TX 29 714
Kelley, Richard Allen Apex, NC 36 1100
Neal, Danny Marvin Round Rock, TX 88 3004

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