Methods and apparatus for address translation from an external device to a memory of a processor
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United States of America Patent
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Apr 27, 2010
Grant Date -
Jun 15, 2006
app pub date -
Dec 14, 2004
filing date -
Dec 14, 2004
priority date (Note) -
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status (Latency Note)
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Abstract
Methods and apparatus provide for adding a base address to an external address to produce first intermediate address; using only a first portion of the first intermediate address as a pointer to select one of a plurality of entries in a segment table, each entry of the segment table representing a different segment of a memory using at least a portion of the selected entry of the segment table as a reference to one or more of a plurality of entries in a page table, each entry in the page table including at least a portion of a physical address in the memory and belonging to a group of entries representing a page in the selected segment of the memory; using the second portion of the first intermediate address to produce a second intermediate address; and using at least a portion of the second intermediate address as a pointer directly to one of the referenced entries in the page table to obtain an at least partially translated physical address into the memory for the external address.
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