Multiple-gate transistors formed on bulk substrates
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United States of America Patent
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Feb 6, 2007
Grant Date -
Feb 17, 2005
app pub date -
Sep 24, 2003
filing date -
Aug 13, 2003
priority date (Note) -
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Abstract
In one aspect, the present invention teaches a multiple-gate transistor 130 that includes a semiconductor fin 134 formed in a portion of a bulk semiconductor substrate 132. A gate dielectric 144 overlies a portion of the semiconductor fin 134 and a gate electrode 146 overlies the gate dielectric 144. A source region 138 and a drain region 140 are formed in the semiconductor fin 134 oppositely adjacent the gate electrode 144. In the preferred embodiment, the bottom surface 150 of the gate electrode 146 is lower than either the source-substrate junction 154 or the drain-substrate junction 152.
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