Ultra low pin count interface for die testing

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7405586
APP PUB NO 20070216438A1
SERIAL NO

11385131

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Abstract

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An apparatus, a method and a system to test a device. An input/output (I/O) block communicates with an external tester to receive test data and to send test result using first and second communication modes. A logic block parses the test data. A memory stores microcode from the parsed test data. The microcode contains a test program to test a circuit. A controller executes the test program.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fackenthal, Rich Carmichael, CA 5 63
Gupta, Sunil Austin, TX 61 506
Linde, Reed El Dorado Hills, CA 13 136

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