Semiconductor structure and manufacturing method of the same
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United States of America Patent
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Sep 25, 2018
Grant Date -
Feb 18, 2016
app pub date -
Aug 15, 2014
filing date -
Aug 15, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
The present disclosure provide a semiconductor structure, including a substrate having a top surface; a gate over the substrate, the gate including a footing region in proximity to the top surface, the footing region including a footing length laterally measured at a height under 10 nm above the top surface; and a spacer surrounding a sidewall of the gate, including a spacer width laterally measured at a height of from about 10 nm to about 200 nm above the top surface. The footing length is measured, along the top surface, from an end of a widest portion of the footing region to a vertical line extended from an interface between a gate body and the spacer, and the spacer width is substantially equal to or greater than the footing length.
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