Method for manufacturing trench MOSFET
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United States of America Patent
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Sep 18, 2007
Grant Date -
Mar 2, 2006
app pub date -
Aug 12, 2005
filing date -
Aug 26, 2004
priority date (Note) -
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Abstract
A method of manufacturing a trench MOSFET with high cell density is disclosed. The method introduces a sidewall oxide spacer for narrowing the opening of the trench structure, thereby decreasing the cell pitch of the memory units. Moreover, the source structure is formed automatically by means of an extra contact silicon etch for preventing the photoresist from lifting during the ion implantation of the prior art. On the other hand, the contact structure is filled with W-plug for overcoming the defect of poor metal step coverage resulted from filling the contact structure with AlSiCu according to the prior art. Thus, the cell density of the device can be increased; and the Rds-on and the power loss of the device can be decreased.
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